1. Field of the Invention
The present invention relates to a MOS integrated device comprising a gate protection diode.
2. Discussion of the Related Art
As is known, power MOS technology is aimed at forming power components interfaceable directly with control logic circuits. As this implies a 3-5 V control voltage of the gate region of MOS devices, power MOS technology has tended to produce devices with a low threshold and, hence, thin gate oxide.
Moreover, in low-voltage (30-60 V) applications, a reduction in output resistance now obviously requires the use of scaled processes with ever-smaller channel lengths and gate oxide thicknesses.
As a result, currently used low-voltage power MOS transistors feature gate oxide thicknesses ranging from 200 to 500 A.
On the one hand, therefore, technological and application requirements demand thin gate oxides, whereas, on the other, application and quality standard requirements demand gate oxides capable of withstanding electrostatic charges. In order to determine whether the gate oxide thickness is able to accomodate these competing interests, test circuits have been devised, the most commonly used of which is shown in FIG. 1.
The test circuit 1 in FIG. 1 substantially comprises a capacitor 2, which is precharged to a test voltage (e.g. 20 V for transistors with a breakdown voltage of 50 V) and then discharged via a resistor 3 into the test transistor 4; the current through transistor 4 is measured by an ammeter 6; and any defective gate oxide is determined according to the current reading.
To protect the gate oxide of power MOS transistors described above from voltages greater than the gate oxide breakdown voltage, it has been proposed by the related art to integrate Zener diodes with a lower breakdown voltage than the gate oxide in any operating condition. This is shown schematically in FIG. 2, in which 10 indicates the power MOS transistor, and 11 indicates the Zener diode, which in this case is formed by a pair of back-to-back diodes 12, 13, and is located between the gate terminal G and source terminal S of transistor 10.
There are various ways of integrating a diode between the gate and source terminals of a MOS transistor, the simplest being to exploit the source-body junction with an inverse bias. According to this solution, a region similar to the source regions of the MOS transistor is formed in a special body well; the well is connected to the gate metal region; and the source-similar region is connected to the source metal region of the transistor.
The above solution, however, presents the disadvantage of inevitably involving a parasitic NPN transistor, which impairs the dynamic strength of the structure.
According to another known solution, protection diodes are integrated over the wafer of semiconductor material using the polysilicon layer used for the gate regions; such solution presents the advantage of eliminating any parasitic elements, by virtue of the diodes being located outside the wafer and separated electrically from it by a thick oxide layer.
The disadvantage of the above solution, however, lies in the need to minimize the area occupied by the protection diodes, to avoid an excessive reduction in the area available for the active device components, or an undesired increase in the overall size of the device. Generally speaking, it is desirable that protection diodes should occupy no more than 3-5% of the total area of the device, which size limitation, however, seriously impairs their effectiveness. In fact, the characteristic of a polysilicon diode presents, after the breakdown voltage, a far from negligible resistance (a few tens of ohms) which depends partly on the aluminium-polysilicon contact and partly on the area of the PN junction. In practice, diode characteristic VD is of the type: EQU VD=VZ+RZI
where VZ is the breakdown voltage (start of inverse conduction of the diode), RZ is the equivalent resistance of the inversely conducting diode, and I is the current through the diode.
In other words following breakdown voltage, the Zener diode is no longer capable of maintaining the breakdown voltage independently of the current flow, presenting a voltage drop which increases with the current. Consequently, in the event, for example, of RZ=30.OMEGA., VZ=15 V, and an oxide breakdown voltage of 25 V, a current I.gtoreq.350 mA is enough to make the protection diode ineffective, since the voltage across the diode becomes greater than the oxide breakdown voltage, destroying the gate oxide.
This is particularly undesirable when using ESD testing according to the circuit of FIG. 1 where the current through the diode may be as high as a few Amps. In such a case, in order to guarantee that the voltage across the diode will not exceed the gate oxide break-down voltage during high currents, the breakdown resistance RZ should be at most a few ohms (RZ&lt;5.OMEGA.).
Thus, in view of the very small voltage margin (defined as VOX-VZ, where VOX is the oxide breakdown voltage) of particularly thin oxides, a problem exits where diodes are formed in the polysilicon layer, requiring very large junction and contact areas for the protection diode to function properly and therefore having breakdown resistances greater than the desired few ohms (SR). Also, the large areas required by the diodes as stated, is in direct conflict with the need to reduce the area occupied by the diodes in order to maximize the area for the active device.